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  technical data IN74HC02A quad 2-input nor gate ordering information IN74HC02An plastic IN74HC02Ad soic t a = -55 t o 125 c for all packages the in74hc 02a i s i d ent i cal i n pi nout t o t h e ls/ a ls02. the devi ce i nput s are com p at i b l e wi t h st andard c m os out put s; wi t h pul l up resi st ors, they are com p atible with ls/alsttl outputs. ? outputs directly interf ace to cmos, nmos, and ttl ? operat i ng vol t a ge r a nge: 2.0 t o 6.0 v ? low input c u rrent : 1.0 a ? high noise im m unity characteristic of cmos devices logic diagram pin 14 =v cc pin 7 = gnd pin assignment function table input s o u t put a b y l l h l h l h l l h h l 1
IN74HC02A maximum ratings * sym b o l p a r a m e t e r valu e un i t v cc dc suppl y vol t a ge (referenced t o gnd) -0.5 t o +7.0 v v in dc input vol t a ge (referenced t o gnd) -1.5 t o v cc +1.5 v v out dc output voltage (referenced to gnd) -0.5 to v cc +0.5 v i in dc input c u rrent , per pi n 20 ma i out dc out put c u rrent , per pi n 25 ma i cc dc suppl y c u rrent , v cc and gnd pins 50 ma p d po wer dissip a tio n in still air, plastic dip * soic package * 750 500 mw tst g st orage tem p erat ure -65 t o +150 c t l lead tem p erat ure, 1 m m from c a se for 10 seconds (plastic dip or soic package) 260 c * m a xi m u m r a t i ngs are t hose val u es bey ond whi c h dam a ge t o t h e devi ce m a y occur. functional operation should be restricted to the reco m m e nded operating conditions. ** derating - plastic dip: - 10 m w / c from 65 t o 125 c soic package: : - 7 m w / c from 65 t o 125 c recommended operating conditions sy m bol p a r a m e t e r m i n m a x uni t v cc dc suppl y vol t a ge (referenced t o gnd) 2.0 6.0 v v in , v out dc input vol t a ge, out put vol t a ge (referenced t o gnd) 0 v cc v t a operat i ng tem p erat ure, al l package ty pes -55 +125 c t r , t f input r i se and fal l ti m e (fi gure 1) v cc =2.0 v v cc =4.5 v v cc =6.0 v 0 0 0 1000 500 400 ns thi s devi ce cont ai ns prot ect i on ci rcui t r y t o guard agai ns t dam a ge due t o hi gh st at i c vol t a ges or el ect ri c fi el ds. however, precautions m u st be taken to avoid applications of any voltage highe r than m a xim u m rated voltages to this hi gh-i m pedance ci rcui t . for proper operat i on, v in and v out shoul d be const r ai ned t o t h e range gnd (v in or v out ) v cc . unused i nput s m u st al way s be t i e d t o an appropri a t e l ogi c vol t a ge l e vel (e.g., ei t h er gnd or v cc ). unused out put s m u st be l e ft open. 2
IN74HC02A dc electrical characteristics (voltages referenced to gnd) guaranteed lim it sy m bol p a r a m e t e r test c ondi t i o n s v cc v 25 c to -55 c 85 c 125 c un it v il m a x i mu m l o w - l e v e l input vol t a ge v out =0.1 v or v cc =0.1 v i out 20 2.0 4.5 6.0 0.5 1.35 1.8 0.5 1.35 1.8 0.5 1.35 1.8 v v ih m i ni m u m hi gh-level input vol t a ge v out =0.1 v or v cc =0.1 v i out 20 2.0 4.5 6.0 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 v v in =v ih or v il i out 20 a 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v in =v ih or v il i out 4.0 m a 4 . 5 0 . 2 6 0 . 3 3 0 . 4 v ol m a x i mu m l o w - l e v e l out put vol t a ge v in =v ih or v il i out 5.2 m a 6 . 0 0 . 2 6 0 . 3 3 0 . 4 v v in =v ih or v il i out 20 a 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 v in =v ih or v il i out 4.0 m a 4 . 5 3 . 9 8 3 . 8 4 3 . 7 v oh m i ni m u m hi gh-level out put vol t a ge v in =v ih or v il i out 5.2 m a 6 . 0 5 . 4 8 5 . 3 4 5 . 2 v i il m a x i mu m l o w - l e v e l input leakage c u rrent v il = g n d 6 . 0 - 0 . 1 - 1 . 0 - 1 . 0 a i ih m a xi m u m hi gh-level input leakage c u rrent v ih =v cc 6 . 0 0 . 1 1 . 0 1 . 0 a i cc m a x i mu m q u i e s c e n t suppl y c u rrent (per package) v il =v cc v ih =gnd i out =0 a 6 . 0 1 . 0 1 0 4 0 a 3
IN74HC02A ac electrical characteristics guaranteed lim it sym b o l p a r a m e t e r t e s t c ondi t i ons v cc v 25 c to -55 c 85 c 125 c un it t plh , t phl m a xi m u m propagat i on del a y , input a or b t o out put y (fi gures 1 and 2) v il =0 v v ih =v cc t lh =t hl =6 ns c l = 50 pf 2.0 4.5 6.0 80 16 14 100 20 17 120 24 20 ns t tlh , t thl m a xi m u m out put transi t i on ti m e , any out put (fi gures 1 and 2) v il =0 v v ih =v cc t lh =t hl =6 ns c l = 50 pf 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns c in m a xi m u m input c a paci t a nce 6.0 10 10 10 pf = 25 c,v cc =5.0 v c pd power di ssi pat i on c a paci t a nce (per gate) used to d e term in e th e no-l o ad dy nam i c power consum pt i on: p d =c pd v cc 2 f+i cc v cc 5 . 0 22 pf figure 1. sw itching waveforms figure 2. test circuit ex panded logic diagram (1/4 of the device) 4
IN74HC02A n s u f f i x p l as t i c di p (m s - 0 0 1 a a ) sy m b o l m i n m a x a 18. 67 19. 69 b 6. 1 7 . 1 1 c 5. 33 d 0. 36 0. 56 f 1. 14 1. 78 g h j 0 10 k 2. 92 3. 81 no t e s : l 7. 62 8. 26 1. d i m e n s i o n s ?a ?, ?b ? d o n o t i n cl u d e m o l d f l as h o r p r o t r u s i o n s . m 0. 2 0 . 3 6 m a x i m u m m o l d f l a s h o r p r o t r u s i o n s 0. 25 m m ( 0 . 010) p e r s i d e . n 0. 38 d su f f i x so i c (m s - 0 1 2 a b ) sy m b o l m i n m a x a 8. 55 8. 75 b 3. 8 4 c 1. 35 1. 75 d 0. 33 0. 51 f 0. 4 1 . 2 7 g h j 0 8 no t e s : k 0. 1 0 . 2 5 1. d i m e n s i o ns a a n d b d o no t i n c l ud e m o l d f l a s h o r p r ot r u s i on . m 0. 19 0. 25 2. m a x i m u m m o l d f l a s h o r p r o t r u s i o n 0. 15 m m ( 0 . 006) p e r s i d e p 5. 8 6 . 2 fo r a ; fo r b ? 0. 25 m m ( 0 . 010) p e r s i d e . r 0. 25 0. 5 d i me n s i o n , mm 1. 27 5. 27 2. 54 7. 62 d i me n s i o n , mm a b h c k c m j f m p g d r x 4 5 se a t i n g pl an e 0.2 5 ( 0 . 0 10 ) m t -t - 1 14 7 8 a b f g d l h se a t i n g pl a n e n k 0.25 ( 0 . 010) m t m j -t - c 1 14 7 8 5


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